JPH0547868B2 - - Google Patents

Info

Publication number
JPH0547868B2
JPH0547868B2 JP1335896A JP33589689A JPH0547868B2 JP H0547868 B2 JPH0547868 B2 JP H0547868B2 JP 1335896 A JP1335896 A JP 1335896A JP 33589689 A JP33589689 A JP 33589689A JP H0547868 B2 JPH0547868 B2 JP H0547868B2
Authority
JP
Japan
Prior art keywords
input
operational amplifier
circuit
transistors
voltage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
JP1335896A
Other languages
English (en)
Japanese (ja)
Other versions
JPH03196280A (ja
Inventor
Hiroshi Kondo
Tsuneo Tooyama
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toko Inc
Original Assignee
Toko Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toko Inc filed Critical Toko Inc
Priority to JP1335896A priority Critical patent/JPH03196280A/ja
Publication of JPH03196280A publication Critical patent/JPH03196280A/ja
Publication of JPH0547868B2 publication Critical patent/JPH0547868B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Amplifiers (AREA)
JP1335896A 1989-12-25 1989-12-25 多入力演算増幅回路とそれを用いた積分回路 Granted JPH03196280A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1335896A JPH03196280A (ja) 1989-12-25 1989-12-25 多入力演算増幅回路とそれを用いた積分回路

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1335896A JPH03196280A (ja) 1989-12-25 1989-12-25 多入力演算増幅回路とそれを用いた積分回路

Publications (2)

Publication Number Publication Date
JPH03196280A JPH03196280A (ja) 1991-08-27
JPH0547868B2 true JPH0547868B2 (en]) 1993-07-19

Family

ID=18293584

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1335896A Granted JPH03196280A (ja) 1989-12-25 1989-12-25 多入力演算増幅回路とそれを用いた積分回路

Country Status (1)

Country Link
JP (1) JPH03196280A (en])

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7675245B2 (en) 2007-01-04 2010-03-09 Allegro Microsystems, Inc. Electronic circuit for driving a diode load
JP5525451B2 (ja) 2007-11-16 2014-06-18 アレグロ・マイクロシステムズ・エルエルシー 複数の直列接続された発光ダイオード列を駆動するための電子回路
US7999487B2 (en) 2008-06-10 2011-08-16 Allegro Microsystems, Inc. Electronic circuit for driving a diode load with a predetermined average current
US8692482B2 (en) 2010-12-13 2014-04-08 Allegro Microsystems, Llc Circuitry to control a switching regulator
US9155156B2 (en) 2011-07-06 2015-10-06 Allegro Microsystems, Llc Electronic circuits and techniques for improving a short duty cycle behavior of a DC-DC converter driving a load
US9265104B2 (en) 2011-07-06 2016-02-16 Allegro Microsystems, Llc Electronic circuits and techniques for maintaining a consistent power delivered to a load
US9144126B2 (en) 2012-08-22 2015-09-22 Allegro Microsystems, Llc LED driver having priority queue to track dominant LED channel
US8957607B2 (en) 2012-08-22 2015-02-17 Allergo Microsystems, LLC DC-DC converter using hysteretic control and associated methods
US8994279B2 (en) 2013-01-29 2015-03-31 Allegro Microsystems, Llc Method and apparatus to control a DC-DC converter

Also Published As

Publication number Publication date
JPH03196280A (ja) 1991-08-27

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